Network-on-Chip Interconnect IP Addresses System-on-Chip Designers’ Needs …
Arteris interconnect IP has been chosen by?6 of the top 10 semiconductor makers?targeting many applications including automotive, video, networking, and mobile-phone processors. Its highly scalable architecture provides an elegant solution for designs ranging from the simple, with just a handful of IPs, to complex, with well over 100 IPs.
Interconnect IP
Arteris’ patented Network-on-Chip (NoC) interconnect IP technology provides a flexible and scalable solution that allows each designer to optimize and achieve the specific design goals for their particular design. Take advantage of fewer wires, less?routing congestion, faster?timing closure, less die area, less schedule risk, and easier derivative creation with these Arteris network-on-chip IP products:
- FlexNoC? – For high performance SoCs?
Arteris FlexNoC is for SoC interconnects with low latency and high throughput requirements. FlexNoC provides support for features such as clock domain conversion, QoS, debug visibility and security. FlexNoC provides multiple protocol support, including AMBA AHB, APB, and AXI, OCP, NIF, and PIF.?more ? - FlexNoC Resilience Package – For mission-critical SoCs
Arteris FlexNoC Resilience Package is a complementary product to Arteris FlexNoC fabric IP. It implements hardware resilience features essential for systems-on-chip (SoCs) targeted for mission- critical uses, such as those requiring ISO 26262 / ASIL (automotive) or IEC 61508 compliance.?more ? - FlexLLI? MIPI LLI digital controller IP – For connecting multiple chips and dies
80 ns latency allows applications processors and modems to share a single DRAM, saving $2 in BOM cost. Also used to connect companion chips, such as LTE coprocessors.?more ? - FlexWay? – For smaller SoCs?
The FlexWay product is for design teams who use a multilayer AMBA AHB bus but are looking for a scalable solution to address their future needs and to quickly and automatically generate and verify the interconnect. FlexWay is ideal for smaller SoC designs using the AMBA AHB protocol.?more ?